Transistors are commonly used in the integrated circuits (ICs). Today's transistors with scaled critical dimensions (CD) demand higher carrier mobility for device performance. To improve carrier mobility (e.g., electrons or holes), strain engineering has been applied since the 90 nm complementary metal-oxide semiconductor (CMOS) node. Generally, inducing a tensile strain in the channel of n-type transistors improves electron mobility while a compressive strain in the channel of p-type transistors improves hole mobility. Various techniques have been proposed to induce the desired stress in the channel region of transistors. As transistors are scaled to smaller dimensions, there is a need for higher carrier mobility for switching speeds. Thus, stress/strain engineering has become increasingly important in recent years. It is therefore desirable to have improvements in the inducement and control of stressors for transistors.